- Industrie: Semiconductors
- Number of terms: 7260
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Texas Instruments (TI) designs and manufactures analog and digital semiconductor IC products for the world market. In addition to analog technologies, digital signal processing (DSP) and microcontroller (MCU) semiconductors, TI designs and manufactures semiconductor solutions for analog and digital ...
A field that identifies which auxiliary register (AR) is assigned to circular buffer 2. These bits are stored in the circular buffer control register (CBCR).
Industry:Semiconductors
A serial register transfer (SRT) controller register that contains a string of continuous 1s. The number and position of these 1s depend on the video RAM (VRAM) serial access memory (SAM) width and the address lines connected to the VRAM.
Industry:Semiconductors
A field that indicates a block repeat is currently active. This bit is normally set when the repeat block (RPTB) instruction is executed and is cleared when the block repeat counter register (BRCR) decrements below 0. Writing a 0 to this bit deactivates block repeat. At reset, BRAF = 0. This bit is stored in the processor mode status register for the TMS320C5x.
Industry:Semiconductors
A serial register transfer (SRT) mode for the video controller (VC) during which an image is captured and stored in memory. Memory locations not corresponding to the captured image are preserved. See also capture mode, display mode.
Industry:Semiconductors
A field that indicates if a load TREG0 (LT/A/D/P/S) instruction loads only temporary register 0 (TREG0) or loads all three of the temporary registers (TREG0, TREG1, and TREG2) to maintain compatibility with the TMS320C2x. The TRM bit allows the TMS320C5x to operate in either ’C2x-compatible mode (TRM = 0) or ’C5x-enhanced mode (TRM = 1) in conjunction with the use of TREG0, TREG1, and TREG2. The TRM bit affects the operation of all ’C2x-compatible instructions that modify TREG0. This bit is stored in the processor mode status register (PMST).
Industry:Semiconductors
A serial-register-transfer (SRT) mode during which information is transferred from the frame memory to the display device. See also capture mode; merge mode.
Industry:Semiconductors
A field that indicates when the data is sampled by the receiver and sent by the transmitter. At reset, CLKP = 0. This bit is stored in the buffer serial port control extension register (SPCE).
Industry:Semiconductors
A set of instructions written to perform a task; a computer program or part of a program.
Industry:Semiconductors
A field that puts the serial port in digital loopback mode. At reset, DLB = 0. This bit is stored in the serial port control (SPC) register and the time-division multiplexed (TDM) serial port control (TSPC) register.
Industry:Semiconductors
A set of memory banks forming a contiguous set of addresses. ’C6x memory banks are interleaved such that striding half-word addresses takes from one bank in the block to the next.
Industry:Semiconductors
